1. Field of the Invention
The present invention relates to a multi-stage radio frequency (RF) amplifier and in particular to a multi-stage RF amplifier with DC coupled RF gain stages.
2. Related Art
FIG. 1 illustrates a conventional two-stage CMOS RF amplifier 100 that uses AC coupling between the RF gain stages. In RF amplifier 100, a first gain stage 111 includes an inductor 101 and an NMOS transistor 103 connected in series between a first voltage source VDD and a second voltage source VSS. Transistor 103 receives the positive differential input signal Vin(+) on its gate. First gain stage 111 further includes an inductor 102 and an NMOS transistor 104 connected in series between first voltage source VDD and second voltage source VSS. Transistor 104 receives the negative differential input signal Vin(−) on its gate.
In RF amplifier 100, a second gain stage 112 includes an inductor 106 and an NMOS transistor 108 connected in series between first voltage source VDD and second voltage source VSS. Node 115, which is located between inductor 106 and transistor 108, provides the negative differential output signal Vout (−). Second gain stage 112 further includes an inductor 107 and an NMOS transistor 109 connected in series between first voltage source VDD and second voltage source VSS. Node 116, which is located between inductor 107 and transistor 109, provides the positive differential output signal Vout (+).
The gate of transistor 108 is connected to node 114 (which is located between inductor 102 and transistor 104) via a capacitor 105. Similarly, the gate of transistor 109 is connected to node 113 (which is located between inductor 101 and transistor 103) via a capacitor 110. Capacitors 105 and 110 provide AC coupling between gain stages 111 and 112.
Notably, the load being driven by each gain stage can be characterized as capacitive. Inductors 101 and 102 can be used to tune out such capacitance. Using resistive elements instead of inductors would not permit the RF amplifier to drive the load with sufficient amplitude at high frequencies. Because the frequency of operation is represented byf=1/2π√{square root over (LC)}  Equation 1wherein L is the inductance of an inductor and C is the capacitance of the load, then the inductance of each inductor can be computed byL=1/C(2πf)2  Equation 2
Note that gain stages 111 and 112 can be biased independently, typically through high value resistors, which can be connected to nodes between capacitors 105/110 and the gates of transistors 108/109. In FIG. 1, one such high value resistor 120 is shown coupled between a node 124 and a bias node 121. Bias node 121 can be biased with a voltage provided by a constant current source 123 and a transistor 122, which are connected in series between VDD and VSS. The gate and the drain of transistor 122 are connected to both bias node 121 and current source 123. In this configuration, at a jigh frequency, the resistance of resistor 120 is much higher than the impedance of capacitor 105, thereby effectively negating the loss due to the biasing elements. Note that similar biasing elements can be connected to a node between capacitor 110 and the gate of transistor 109.
Unfortunately, the AC coupling capacitors (i.e. capacitors 105 and 110) introduce parasitic capacitance at one or both of its terminals. Because of this extra parasitic capacitance, smaller tuning inductors (i.e. inductors 101, 102, 106, and 107) must be used, which can result in lower gain for RF amplifier 100. In addition, the input parasitic capacitance associated with second gain stage 112 forms a voltage divider with the AC coupling capacitors (i.e. capacitors 105 and 110), which can result in further gain reduction of RF amplifier 100. When second gain stage 112 is large and has large input capacitance (particularly the case between the gain stages of an on-chip high-power RF amplifier), the performance of RF amplifier 100 suffers significantly because of the above-described parasitic capacitance and voltage divider configuration. To satisfy a normal gain requirement under such conditions, extra power needs to be consumed. Moreover, the AC coupling capacitors are usually large devices, thereby using significant silicon area.
Therefore, a need arises for an RF amplifier that eliminates the AC coupling between its gain stages, thereby improving performance and saving silicon area.